Method and apparatus for subperiod measurement of successive variable time periods

ABSTRACT

Self-clocking method and apparatus for continuously detecting desired subperiods of time periods between successive pulses where the time periods may vary. The successive pulses indicate the start and stop of each time period. A switching network responds to the start-stop indications to generate a responsive signal, e.g. a ramp function signal. The characteristics of the ramp are dependent upon the start and stop indications. A comparator network compares the magnitude of the responsive signal to a reference signal stored from the preceding period. The invention herein described was made in the course of performance of a contract with the Department of the United States Army.

United States Patent I [111 3,585,502

[72] Inventor Joseph W. Barkley, Jr. 2,645,755 7/ 1953 Garfield 324/70UX Redwood City, Calif. 3,038,155 6/1962 Parquier et al. 328/165 X [21]Appl. No. 749,142 3,140,442 7/1964 Germain 324/68 [22] Filed July 31,1968 3,389,244 6/1968 Brockett 324/68 [45] Patented June 15, 19713,359,491 12/1967 McCutcheon 324/68 [73] Assign Primary Examiner-AlfredE. Smith w a Attorney-Robert G. Clay [54] ABSTRACT: Self-clocking methodand apparatus for continu- 1 TIME PERIODS ously detecting desiredsubperiods of time periods between 15 C 4 D in successive pulses wherethe time periods may vary. The suca cessive pulses indicate the startand stop of each time period. [52] U.S. CI... 324/189 A switchingnetwork responds to the start-stop indications to a [51] Int. Cl. 604i9/00, generate a responsive signal, e.g. a ramp function signal. TheG04f 1 1/00 characteristics of the ramp are dependent upon the start and[50] Fieldof Search 324/68, 70; stop indications. A comparator networkcompares the mag- 328/129, 130, 138, 165; 235/92 T; 307/232,234 nitudeof the responsive signal to a reference signal stored from the precedingperiod. References CIM v The invention herein described was made in thecourse of UNITED STATES PATENTS performance of a contract with theDepartment of the United 2,494,357 1/1950 Rogers 328/138 StaIeSArmy- I-1 l2 GEN SWITCH SWITCH n I l T 5 I SWITCH SWlTCl-l w 9 i i l3 i DELAY22 I 7 DIFE come INPUT "'l" 3 T0 27 semi PATENTEU JUN I 5 ISII SHEET 1[IF 2 SWITCH NETWORK DELAY w m U H ml 1 1% GR D B 1 I m G E 3 .D A r AWF O HC Q E S m w m SWITCH pow SWITCH IIOII lllll C F.F.

DELAY INPUT CLOCK c PULSES INVENTOR JOSEPH w. BARKL PATENTEDJUNISISYI3585,5502 sumaurz I SWITCH I E l! TO 45 ELA sw|TcH To T INPUT 22 CLOCK yPULSES TAPE MOTION T E TRANSVERSE TRACKS TIE-L151 CONTROL e P'IB El lINVENTOR. JOSEPH w BARKLEY,JR. A i i r' 45 B 7W E ,e, TI Ei iii-J TATTORNEY ETUQPAND PPARATU F KSUB-RILRIQD MEASUREMENT OF SUCCESSIVEVARIABLE TIME PERIODS BACKGROUND OF THE INVENTION The present inventionrelates to the detection of a desired percentage of a time period wherethe time period may vary over a large range of values. Though there willbe various recognized applications, the invention provides a highlysatisfactory solution to a problem encountered in magnetic tapeinformation storage and retrieval systems storing large volumes ofinformation. In such systems it is desirable to have selective rapidaccess to all segments of the tape for retrieval, modification orerasure of the information recorded at a select segment of block. Forexample, in magnetic tape document storage and retrieval systemsnumerous documents are recorded on the tape. It may be desired afterreading or recording a document of one segment of the tape, to read orrecord another document on another segment of the same tape displacedseveral hundred feet from the first document. Also, as certain documentsbecome obsolete, it is desirable to erase that recorded document andreplace it with another. In such systems during the record or readingmode tape speed is relatively slow, e.g. inches per second (ips), andduring the search mode of transporting between remote locations, thetape velocity is relatively high, e.g. 500-- I000 ips. It is essentialthat the transport continuously identify the tape location so thatduring search the transport speed be reduced when the select segment ordocument is neared and/or reached. Also, during record or playback ofthe select block or document there need be control over actual speed forminimizing the effects of time base errors.

Identification of the actual longitudinal position of the tape and thetape itself are realized through use of a tape addressing subsystem.Unique address pulses are recorded for each block of intelligence toidentify its actual location on the tape. Also, one approach to tapespeed control is to record on a longitudinal track of the tape a clockreference pulse train or evenly spaced pulses. Then in the playback andrecord modes the velocity is determined by sensing these pulses. Thephysical distance between reference clock pulses being substantiallyconstant, the time period between successive pulses is a function oftape speed with the timer period substantially less in the high speedsearch mode than in the record or playback modes. Generally, the controltrack and address track signals are recorded prior to the recording ofany documents or intelligence and then as the documents are recordedeach is referenced to the unique block or blocks.

In recording the address pulses, they may be referenced to the clockpulses on the control track such that during a subclock period theaddress information appears identifying the block. For example, theaddress code may be recorded on the middle X percent of successive clockpulses. Therefore, during the middle X percent of the time period theaddress information identifying the block is available. The clock andaddress data may be recorded or separate longitudinal tracks or possiblythe same track with the address data intermediate successive clockpulses. Obviously, it further becomes necessary to differentiate betweenthe clock reference and address data. Thus, thetape velocity is sensedby the clock reference pulse and the position by unique address pulsesidentifiable with individual blocks. During the search mode with thedesired block remote, tape speed may be maximum and as the select blockor document is neared tape speed decreased. When the select block isreached, the transport may be at stop or operating at the record orplayback speed.

An object of the present invention is to teach a self-clocking methodand apparatus for monitoring, tracking and detecting reference clock andsubclock periods notwithstanding wide variations in the block periods.

SUMMARY OF THE PRESENT INVENTION The method and apparatus of monitoring,tracking and detecting reference clock and subclock periods of thepresent invention utilizes features of electrical excitation, storageand feedback. The change in clock periods may be viewed as a continuousfunction. A switching network extending to an electrical charge storagemeans responds to the start and stop pulses of each clock period tocontrol excitation to the charge storage means. The charge storage meansmay be such that part of it holds a charge while another part is beingcharged. Detecting means, such as voltage comparators, respond to thecharge level on the holding and charging parts. The subperiod of theclock period is selected by detecting the actual charge on the chargingpart relative to the reference level set by the charge on the holdingpart. The time for said charging part to reach the reference levelestablishes the subperiod. As the time period between successive pulsesvaries there are corresponding variations in the charging time of thecharging meansf'lhus, the detecting means compares a relatively constantpercentage of the time duration between successive switching signalsnotwithstanding variations in successive time durations. As used inmagnetic tape recording and retrieval, the address data, which mayberecorded within a select percentage of the clock period of successivecontrol track pulses, may be interrogated and extracted by an addressreading means operational during the subperiod.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a generalized block diagramof a circuit in accordance with the present invention;

FIG. 2 is a further embodiment incorporating the teachings of thepresent invention;

FIG. 3 is an alternate embodiment of the ramp generator network of FIGS.1 and 2;

FIG. 4 is a generalized diagram of a segment of a recorded magnetic tapeand illustrating the recording of intelligence clock reference andaddress information in accordance with the principles of rotary-headmagnetic tape recorders; and

FIGS. SA-SJ graphically illustrate the electrical charge of thecapacitors of the various charging circuits and the detecting voltagelevels of the networks of FIGS. 1-3 with and without feedback and withchanging time periods.

DESCRIPTION OF THE PREFERRED EMBODIMENTS The generalized circuitry ofFIG. 1 illustrates apparatus for practicing a method for generating theinterrogating signals of a changing time period and for providing anoutput signal during a subperiod of each time period. For example, inthe magnetic tape recorder art the change in time or clock periodbetween successive recorded clock pulses may be due to tape accelerationand deceleration. The network of FIG. 1 is designed to sense a subperiodof each successive time period notwithstanding changes in the timeperiods. The network includes a binary counter or a flip-flop circuit 3receiving input clock pulses, e.g. those originating from the recordedlongitudinal clock track of a magnetic tape. The zero" output terminalof the flip-flop 3 extends to the first AND gate 5 and the one outputextends to a second AND gate 7. The inputs of the AND gates 5 and 7 arealso common to a delay network 9 which receives the input clock pulses.The AND gate 5 is tied to a first shorting switch 11 of a ramp signalgenerator switch stage referred to by the general reference character12. The AND gate 7 is common to a second shorting switch 13. Across thefirst switch 11 is a charging capacitor 15. Across the switch 13 is acharging capacitor 17. The charging capacitor 15 extends through a diode19 to a differential comparator 21. The cathode of the-diode 19 iscommon to the switch 11 and the capacitor 15 while the anode is commonto a first input tenninal 22 common to the differential comparator 21and a bias potential source +V. The switch 11 also extends through adiode 23 and a resistance source 25 to a second input terminal 26 of thedifferential comparator 21 and to a reference plane (ground) through aresistance 27. The anode of the diode 23 is common to the switch 11 andthe capacitor 15 while the cathode is common to the resistance source25. The switch 13 extends through a diode 28 to the input terminal 22 ofthe differential comparator 21 with the anode tied to the comparator andthe cathode to the switch. The switch 13 also extends through a diode 29and the resistance 25 to the reference terminal 26 of the comparator 21.The cathode of the diode 29 is tied to the resistance source 25 and theanode to the switch 13 and the capacitor 17. The cathode of the diodes23 and 29, regardless of which capacitor 15 or 17 is holding," serves asa reference level E from which the voltage detecting level E for thecomparator 21 is established.

The one output terminal of the flip-flop 3 is also common to a thirdswitch 31. The switch 31 is intermediate the first capacitor 15 and acurrent generator 33. The "zero" output terminal of the flip-flop 3 iscommon to a fourth switch 35. The switch 35 is intermediate the secondcapacitor 17 and the current generator 33. Obviously, all switchesincluded herein may be of the electronic type.

The theoretical operation of the network of FIG. 1 is believed to be asfollows. Referring to FIGS. 4 and A-5E, FIG. 4 depicts a segment of amagnetic tape recorded with a format compatible with rotary headtransverse scan recorders. Various transverse tracks are depicted. Alongitudinal control-address track is depicted including a train ofevenly spaced pulses C with unique address pulses intermediate. Thecontrol I track pulses are generally incorporated to provide referencesignals for servocontrolling the speed of the tape drive system andproviding time base stability. The distance d between successive clockpulses C is equal with the time period between the pulses dependent upontape velocity. As tape velocity varies the time period also varies. Theaddress pulses for unique individual increments of recorded data arereferenced to the clock pulses. A predetermined distance d' betweencontrol track pulses C is reserved for the address data. Thus, inessence, the control-address track provides information as to tapevelocity, tape address clock and tape address. This recorded informationis extracted during all tape speeds and all modes of operation. The tapespeeds which depend on the operational mode may vary over a large range.For example, in present day digital tape data storage and retrievalsystems, the range may vary in the order of 1000 to I. For rapid accessto and retrieval of any select decoded document, the tape is transportedat a high rate, e.g. 500 1000 ips, until the select segment is neared.During this mode, commonly referred to as the search mode," the addresstrack is continuously read to inform" the transport control subsystem ofthe actual location. When the select segment is reached the speed isslowed to the read or write speed, e.g. 5 ips. During the read or writemode the address track is read so that the transport control subsystemis informed that the actual tape segment coincides with the selected.

The transport includes a control track head (not shown) positioned tosense the control track signals C. The tape velocity is determined bythe rapidity with which the pulses C pass the head. Address read andwrite heads may also be positioned so as to write or read the addressdata. Since the address data is referenced to the clock data on thecontrol track and occurs during a subperiod of the clock periods, theaddress circuitry is referenced to the control track signals. Coding ofthe address data pulses requires comparison of each data period to theassociated clock period. Fox example, the address data may be in the Xmiddle percent of successive control track signals C. It than becomesnecessary to maintain cognizance of the time periods as they change dueto the changing tapevelocity.

The method of the present invention for generating or interrogatingsignals at a changing clock rate and as realized from the circuitry ofFIG. 1 utilizes alternate chargeof the capaci tors and 17 through thecurrent source 33 to form a ramp function signal to the differentialcomparator 21.- The final level of the ramp voltage produced across eachcapacitor is determined by the time period between successive inputclock pulses to the flip-flop 3. Viewing FIG. 5A there is illustratedthe charge potential e and e across the capacitors 15 and 17,respectively, at constant tape speed. The charge rate of the capacitorsremains the same while the charge period is dependent upon the timeperiod between successive clock pulses C.

Since the tape speed is constant, the time periods are equal. Theswitching arrangement is such that the ramp voltage level is held acrossone of the capacitors while the other is charging. While the capacitor17 is charging, the capacitor 15 is holding. When a clock pulse issensed the holding capacitor is discharged and commences charging whilethe other holds.-

The capacitors maintain this status until the next clock pulse. Thepotential on the holding capacitor serves as a reference E for thevoltage comparator 21 and the ramp function potential across the othercapacitor is supplied to the terminal 22 common to the input of thecomparator 21. The voltage divider network of the resistors 25 and 27divide E so that it may be used as the desired detecting level E. Theoutput of the comparator 21, which determines the state of theinterrogate pulses controlling the address circuitry network (not shown)thus commences when the ramp signal equals and exceeds E. The comparatoroutput stops when the next clock pulse from the tape is detectedcoinciding with discharge of the holding capacitor and removal of rampsignal to the terminal 22. The cycle is then repeated with thecapacitors switching their respective operational functions.

The change in clock period may be viewed as a continuous function. Forexample, the change in clock periods between pulses C of the tapesegment of FIG. 4 results during tape acceleration or deceleration. FIG.53 represents the charge potential e and e of the capacitors l5 and 17graphically super-imposed while FIGS. 5C and 5D represent the chargesindividually for the network of FIG. 1 during changing time periods. Thecurve of FIG. 5E illustrates the response detecting level .5 which isreduced from E due to the voltage dividing action of the resistors 25and 27. In analyzing the graphs, assume the capacitor 17 is chargingwhen the next input clock pulse is received. The flip-flop 3 opens theswitch 35 to tenninate further charging of the capacitor 17. Thecapacitor 17 holds its charge. The gate 5 momentarily closes theshorting switch 11 to discharge the capacitor 15 which was previously inthe hold" state. The capacitor 15 then commences charging through switch31 which closed when the switch 35 opened. The condition is now a hold"voltage on the capacitor 17 and an increasing voltage on the capacitor15. The potential on the diode 29 is now higher than that on the diode23. Voltage reference E is thus derived from the capacitor 17 throughthe diode 29. The resistors 25 and 27 determine the percent of decreaseof the potential E to set the detecting level E at the terminal 26. The+V potential determines which diode 19 or 28 conducts by selecting theone with the lowest potential on the cathode. In this case it is thediode 19. As the charge on the capacitor 15 increases, an outputindication from the comparator 21 is generated dependent on thepotential e and 5' relationship. The differential comparator 21generates an output until the next clock pulse.

FIG. 2 is a generalized modified circuit network of FIG. 1 providing aplurality of output signals indicative of a percent of a time period. Itfurther includes a feedback network from the reference potential E tothe current generator 33. The resistance 25, which is at the capacitorcharge value, is tied through a filter network 39 and a currentgenerator drive 41 to the current generator 33. The filter network 39 isincluded to remove undesired frequency components, for example, thosedue to the switching action of the capacitors 15 and 17. The feedbacknetwork provides for maintaining the maximum charge across thecapacitors 15 and 17 constant notwithstand ing changes in charge time.The charging current from the current generator 33 is controlled withrespect to the charge rate changes and the amplitude varied, withfeedback the rate changes and the amplitude constant. Thus, if thevoltage E tends to decrease, the charging current is increased and viceversa to maintain a constant E FlG. 5F illustrates the "charge" of thecapacitors l5 and 17 with the feedback network. It may be noted thatduring the charge" cyclethe rate of charge changes with correspondingchanges in the time period. FIG. 56 illustrates the detecting levelpotential E which is a substantially constant value.

FIG. 2 further illustrates the inclusion of a second differentialcomparator 43. The comparator 43 is common to the first input terminal22. The detecting level to the comparator 43 is common to the resistance25 but at a potential level level E" different from that of thecomparator 21. Thus, the comparator 43 provides an output indication ata different percent of the time period (charge on charging capacitor)from that of the comparator 21. The use of multiple outputs at differentpercents of the time period may be put to use in various ways dependingupon the applications. For example, viewing FIG. 4, the address data iswithin the middle segment between successive pulses C. Thus, it may bedesirable to turn the address circuitry on when the address data blockstarts and turn it off" when the address data stops. In FIG. 2, byknowing that the address data is within the middle X percent of the tapesegment between successive pulses, the detecting level potentials E andE" may be selected within this percentage by proper selection of theresistors 25 and 26 and tapping of the resistor 25 for the differentialcomparator 43. The output from the comparator 21 may turn the addresscircuitry on and the output from the comparator 41 turn it off." FIG. 5Hillustrates graphically the two detecting levels E and E which may beused to turn on" and off" the address circuitry.

Flg. 3 depicts generalized circuitry for another embodiment for a rampgenerator switching stage 12. In this embodiment, rather than use fourswitches, only two are necessary. The switch 13 is placed intermediatethe charging capacitor 15 and storage capacitor 45. Thus, when capacitor15 is charging, the switch 13 is open. Upon completion of the charge ofcapacitor 15, the switch 13 is closed and the charge transferred to thestorage capacitor 45. The switch 13 is then opened and the capacitor 45provides the reference level E,.,,. The charging capacitor 15 isdischarged by closing the shorting switch 11 responsive to a sigma; fromthe delay 9. The capacitor 15 is again charged during the next period.The idealized charging waveforms of the capacitors l4 and 45 aredepicted in FIG. 5I. The network of FIG. 3 can also be used withfeedback as in FIG. 2 in which case the waveforms take the form of FIG.SJ

lclaim:

l. A method for detecting a percentage portion of each of successivetime periods whose durations may vary comprising the steps of:

detecting the duration of each of the successive time periods;

resolving from the duration of each detected time period the beginningand ending times of the percentage portion of the detected time period;and

examining each of the succeeding ones of the successive time periods toprovide indications at times thereof corresponding to the beginning andending times of the percentage portion resolved from the immediatelyprevious detected time period.

2. A self-clocking network for detecting a subperiod of each period ofsuccessive time periods whose durations may vary over a wide rangecomprising:

timing means responsive to the start and stop of each one of thesuccessive time periods to generate a discrete signal representative ofthe duration of each one of the successive time periods;

storage means for storing the discrete duration representative signalgenerated during each time period while the timing means is generatinganother discrete signal representative of the duration of theimmediately successive time period;

means responsive to the discrete'signal stored during each time periodto provide a discrete reference signal representative of a particularsegment of a selected percentage of the duration represented by thestored signal; and

comparator means for receiving the discrete signal being generated bythe timing means and the discrete reference signal to provide aresponsive indication when the signal being generated by the timingmeans represents a time within the particular selected percentagesegment of the duration represented by the discrete reference signal.

3. The network according to claim 2 further comprising means responsiveto the stored discrete duration representative signal for controllingthe timing means to issue duration representative signals whose absolutemagnitude stored for initiating the generation of the reference signalis not greater than a predetermined absolute magnitude regardless ofchanges in the duration of successive time periods.

4. The network according to claim 2 wherein successive pulses indicatethe start and stop of the successive time periods, the timing means is aramp signal generating means for generating successive ramp signals inresponse to successive pulses, each ramp signal having a final levelfrom which the duration of the time period during which the ramp signalwas generated can be determined, the storage means stores a discretesignal representative of the final level of the ramp signal generatedduring each time period, and the discrete reference signal provided bythe reference signal generating means represents a particular levelsegment of a selected percentage of the final level of the generatedramp signal.

5. The network according to claim 4 wherein the discrete referencesignal provided by the reference signal generating means represents aparticular level less than the final level of the ramp signal, and thecomparator means provides the responsive indication when the ramp signalbeing generated by the timing means reaches a level corresponding to theparticular level represented by the discrete reference signal.

6. The network according to claim 4 further comprising means responsiveto the stored discrete signal for controlling the ramp signal generatingmeans to change the slope of the ramp signal generated thereby tomaintain the final level of each ramp signal constant regardless ofchanges in the duration between successive pulses.

7. The network according to claim 4 wherein the reference signalgenerating means provides a discrete reference signal representative ofa first particular level and of a second particular greater level of theramp signal, and the comparator means provides a first indication whenthe ramp signal being generated by the timing means reaches a levelcorresponding to the first particular level and a second indication whenthe ramp signal reaches a level corresponding to the second particularlevel.

8. The network according to claim 7 further comprising means responsiveto the stored discrete signal for controlling the ramp signal generatingmeans to change the slope of the ramp signal generated thereby tomaintain the final level of each ramp signal constant regardless ofchanges in the duration between successive pulses.

9. The network according to claim 2 wherein the timing means includes aswitching means and a charging means, the storage means is a chargeholding means, the charging means is responsive to the switching meansto initiate at the start of each time period charging for the durationof each time period, the charge holding means is responsive to theswitching means at the stop of each time period to hold chargeindicative of the maximum level of the charge of the charging meansduring the preceding time period, the held charge representative of theduration of the preceding time period, the reference signal generatingmeans is a voltage divider means providing a voltage reference signalrepresentative of the particular segment of the duration represented bythe held charge, and the comparator means provides the responsiveindication when the charge of the charging means is within the segmentrepresented by the voltage reference signal.

10. The network according to claim 9 wherein successive pulses indicatethe start and stop of the successive time periods, the charging meansand charge holding means each includes one of a pair of capacitors eachextending to a current generator source through the switching means, theswitching means responds to successive pulses to couple the currentsource to one of the capacitors during alternate time periods and to theother of the capacitors during the remaining time periods whereby eachof the capacitors alternately serves as the charging means and as thecharge holding means, and further comprising means for coupling thecapacitors serving as the charge holding means to the voltage dividermeans for the duration of the time period said capacitor serves as thecharge holding means.

11. The network according to claim 10 further comprising a secondswitching means extending across each of said capacitors, the secondswitching means responding to successive pulses and momentarily shortingthe capacitor serving as the charge holding means to discharge the heldcharge prior to charging the capacitor during the succeeding timeperiod.

12. The networkaccording to claim 11 further comprising means responsiveto the level of charge held by the charge holding capacitor forcontrolling the current generator source to change the level of heldcharge provided during each time period constant regardless of changesin the duration between successive pulses.

13. The network according to claim 9 wherein the voltage divider meansprovides a first voltage representative of a first particular level ofcharge and a second voltage representative of a particular secondgreater level of charge, and the comparator means includes a pair ofcomparators, each of the comparators referenced to the charge on thecharging means, and one of the comparators coupled to receive the firstvoltage and the other of the comparators coupled to receive the secondvoltage provided by the voltage divider means whereby the one comparatorprovides a first indication when the level of the charge on the chargingmeans reaches that corresponding to the first voltage and the othercomparator means provides a second indication when the level of thecharge on the charging means reaches that corresponding to the secondvoltage.

14. The network according to claim 13 further comprising meansresponsive to the level of charge held by the charge holding means forcontrolling the rate of charge of the charging means to maintain thelevel of held charge provided during each time period constantregardless of changes in the duration of successive time periods.

15. The network according to claim 14 further comprising a secondswitching means responsive to the start of each successive time periodto discharge the charge holding means prior to initiating the charge ofthe charging means during the succeeding time period.

1. A method for detecting a percentage portion of each of successivetime periods whose durations may vary comprising the steps of: detectingthe duration of each of the successive time periods; resolving from theduration of each detected time period the beginning and ending times ofthe percentage portion of the detected time period; and examining eachof the succeeding ones of the successive time periods to provideindications at times thereof corresponding to the beginning and endingtimes of the percentage portion resolved from the immediately previousdetected time period.
 2. A self-clocking network for detecting asubperiod of each period of successive time periods whose durations mayvary over a wide range comprising: timing means responsive to the startand stop of each one of the successive time periods to generate adiscrete signal representative of the duration of each one of thesuccessive time periods; storage means for storing the discrete durationrepresentative signal generated during each time period while the timingmeans is generating another discrete signal representative of theduration of the immediately successive time period; means responsive tothe discrete signal stored during each time period to provide a discretereference signal representative of a particular segment of a selectedpercentage of the duration represented by the stored signal; andcomparator means for receiving the discrete signal being generated bythe timing means and the discrete reference signal to provide aresponsive indication when the signal being generated by the timingmeans represents a time within the particular selected percentagesegment of the duration represented by the discrete reference signal. 3.The network according to claim 2 further comprising means responsive tothe stored discrete duration representative signal for controlling thetiming means to issue duration representative signals whose absolutemagnitude stored for initiating the generation of the reference signalis not greater than a predetermined absolute magnitude regardless ofchanges in the duration of successive time periods.
 4. The networkaccording to claim 2 wherein successive pulses indicate the start andstop of the successive time periods, the timing means is a ramp signalgenerating means for generating successive ramp signals in response tosuccessive pulses, each ramp signal having a final level from which theduration of the time period during which the ramp Signal was generatedcan be determined, the storage means stores a discrete signalrepresentative of the final level of the ramp signal generated duringeach time period, and the discrete reference signal provided by thereference signal generating means represents a particular level segmentof a selected percentage of the final level of the generated rampsignal.
 5. The network according to claim 4 wherein the discretereference signal provided by the reference signal generating meansrepresents a particular level less than the final level of the rampsignal, and the comparator means provides the responsive indication whenthe ramp signal being generated by the timing means reaches a levelcorresponding to the particular level represented by the discretereference signal.
 6. The network according to claim 4 further comprisingmeans responsive to the stored discrete signal for controlling the rampsignal generating means to change the slope of the ramp signal generatedthereby to maintain the final level of each ramp signal constantregardless of changes in the duration between successive pulses.
 7. Thenetwork according to claim 4 wherein the reference signal generatingmeans provides a discrete reference signal representative of a firstparticular level and of a second particular greater level of the rampsignal, and the comparator means provides a first indication when theramp signal being generated by the timing means reaches a levelcorresponding to the first particular level and a second indication whenthe ramp signal reaches a level corresponding to the second particularlevel.
 8. The network according to claim 7 further comprising meansresponsive to the stored discrete signal for controlling the ramp signalgenerating means to change the slope of the ramp signal generatedthereby to maintain the final level of each ramp signal constantregardless of changes in the duration between successive pulses.
 9. Thenetwork according to claim 2 wherein the timing means includes aswitching means and a charging means, the storage means is a chargeholding means, the charging means is responsive to the switching meansto initiate at the start of each time period charging for the durationof each time period, the charge holding means is responsive to theswitching means at the stop of each time period to hold chargeindicative of the maximum level of the charge of the charging meansduring the preceding time period, the held charge representative of theduration of the preceding time period, the reference signal generatingmeans is a voltage divider means providing a voltage reference signalrepresentative of the particular segment of the duration represented bythe held charge, and the comparator means provides the responsiveindication when the charge of the charging means is within the segmentrepresented by the voltage reference signal.
 10. The network accordingto claim 9 wherein successive pulses indicate the start and stop of thesuccessive time periods, the charging means and charge holding meanseach includes one of a pair of capacitors each extending to a currentgenerator source through the switching means, the switching meansresponds to successive pulses to couple the current source to one of thecapacitors during alternate time periods and to the other of thecapacitors during the remaining time periods whereby each of thecapacitors alternately serves as the charging means and as the chargeholding means, and further comprising means for coupling the capacitorsserving as the charge holding means to the voltage divider means for theduration of the time period said capacitor serves as the charge holdingmeans.
 11. The network according to claim 10 further comprising a secondswitching means extending across each of said capacitors, the secondswitching means responding to successive pulses and momentarily shortingthe capacitor serving as the charge holding means to discharge the heldcharge prior to charging the capacitor during the succeedIng timeperiod.
 12. The network according to claim 11 further comprising meansresponsive to the level of charge held by the charge holding capacitorfor controlling the current generator source to change the level of heldcharge provided during each time period constant regardless of changesin the duration between successive pulses.
 13. The network according toclaim 9 wherein the voltage divider means provides a first voltagerepresentative of a first particular level of charge and a secondvoltage representative of a particular second greater level of charge,and the comparator means includes a pair of comparators, each of thecomparators referenced to the charge on the charging means, and one ofthe comparators coupled to receive the first voltage and the other ofthe comparators coupled to receive the second voltage provided by thevoltage divider means whereby the one comparator provides a firstindication when the level of the charge on the charging means reachesthat corresponding to the first voltage and the other comparator meansprovides a second indication when the level of the charge on thecharging means reaches that corresponding to the second voltage.
 14. Thenetwork according to claim 13 further comprising means responsive to thelevel of charge held by the charge holding means for controlling therate of charge of the charging means to maintain the level of heldcharge provided during each time period constant regardless of changesin the duration of successive time periods.
 15. The network according toclaim 14 further comprising a second switching means responsive to thestart of each successive time period to discharge the charge holdingmeans prior to initiating the charge of the charging means during thesucceeding time period.